1. Field of the Invention
The present invention relates to a method for manufacturing a thin-film integrated circuit typically known as an active matrix type liquid crystal display device. Also, the present invention is related to another method for manufacturing an integrated circuit with employment of a semiconductor device where wiring patterns and electrodes have been formed by utilizing the anodic oxidation technique.
2. Description of the Related Art
Very recently, great attentions are paid for thin-film transistors constructed by employing thin-film semiconductors fabricated on glass substrates. The thin-film transistors are mainly utilized in active matrix type liquid crystal display devices. An active matrix type liquid crystal display device has such a structure that thin-film transistors are connected to the respective pixel electrodes, and electric charges entered into and derived from these pixel electrodes are controlled by the thin-film transistors. These pixel electrodes are arranged in a matrix form made of several hundreds of pixels.
A thin-film transistor connected to a pixel electrode requires such a characteristic of a low OFF current thereof. This is because electric charges held by the pixel electrode should be held for predetermined time. However, generally speaking, the normal thin-film semiconductors are made under amorphous state, or polycrystal state. Therefore, practically speaking, the existence of the OFF current flowing through the grain boundary is not negligible.
As the structures used to cancel or suppress the existence of this OFF current, various structures have been proposed that the LDD (light dope region) structure is fabricated and the offset gate region is formed. This LDD structure is described in Japanese Patent Publication No. 3-38755 (in 1991). The offset gate structure is described in Japanese Laid-open Patent Application No. 4-360580 (in 1992).
The conventional technique described in Japanese Laid-open Patent Application No. 4-360580 can form the offset gate structure in the self-alignment manner and thus can achieve the high productivity. In accordance with this prior art technique, the gate electrode is fabricated by employing aluminum as the material thereof, and the anodic oxidation is carried out while using this gate electrode as the anode, so that the oxide layer is formed around the gate electrode, and furthermore, the offset gate region is fabricated by using a portion of the gate electrode having the same thickness as that of this oxide layer.
Since the thickness of the oxide layer may be controlled by controlling the voltages applied during the anodic oxidation in accordance with this conventional technique for manufacturing the oxide layer by utilizing this anodic oxidizing technique, the high reproducibility can be achieved. In particular, in the thin-film transistor having the offset gate structure, the characteristics of the thin-film transistors are greatly different from each other, depending upon the dimensions of the offset structures. Accordingly, it is very important to realize such a technique for correctly forming the dimensions of the offset gate structures under better controls. Therefore, the technique for fabricating the anodic oxide layer around the gate electrode under better controls may form a large number of thin-film transistors whose electric characteristics are matched with each other, resulting in a very useful technique.
On the other hand, a strong demand is made of such a design rule that dimensions of thin-film transistors arranged in a pixel region of an active matrix type liquid crystal display device should be reduced as small as possible. This is because the numerical aperture of the pixel should be increased. Since the pixel is required to pass light therethrough, the dimension of the pixel part which may interrupt the light transmission could be preferably made as small as being permitted.
Under these circumstances, the widths of the source lines and also of the gate lines, which are arranged in a matrix form, should be made narrow. The widths of the source lines and of the gate lines may be determined within such a range that the thin-film transistors employed in the pixel region arranged in a matrix form should be operated. Generally speaking, the widths of the source lines and of the gate lines may be determined within a range where the required display characteristic could be achieved, taking account of the voltage drops occurred in the wiring patterns and also the time constant.
However, in the case that the above-explained anodic oxidation technique is utilized, since the current should be supplied to the gate lines so as to perform the anodic oxidation, the resistance values of these gate electrodes must be considered. That is, the thickness of the oxide layer during the anodic oxidation may be determined based upon the voltage applied to the anode (i.e., gate electrode in this case). When the voltage drops are produced in the gate electrodes, there are differences in the dimensions of the offset gates of the thin-film transistors with respect to each pixel. As a result, there are fluctuations in the characteristics of the thin-film transistors for the respective pixels. Thus, the fluctuations would cause display fluctuations of the display screen and display failures.
As a result of the anodic oxidation, the anodic oxide layer is formed around the gate electrode and the essential portion of the conductor is made narrow, so that sufficient margins should be established.
To solve this problem, both of the width of the gate wiring and also the height thereof should be made sufficiently large, and also the resistance value of this gate wiring must be selected to be such a low level that this resistance value causes no problem during the anodic oxidation. Furthermore, in the active matrix type liquid crystal display device having the large display area, the length of the gate line would be further extended, so that the voltage drop problem would be particularly emphasized. To avoid this voltage drop problem, both of the width of this gate line and the height thereof should be furthermore increased.
However, since widening of the gate line width may cause the numerical aperture to be lowered, the gate line width must be narrowed as much as possible. Moreover, the height of the gate line could not be made unnecessary high in view of the processing method.
As previously described, in the active matrix type liquid crystal display device it is useful for the thin-film transistor arranged in the pixel region to employ such a structure that the anodic oxide layer is fabricated around the gate electrode. However, in order to supply the current required for performing the anodic oxidation to the gate line, the resistance value thereof must be sufficiently reduced. To this end, the required width of the gate line must be sufficiently widened. Nevertheless, when the width of this gate line is made wide, the numerical aperture of the pixel would be lowered. This numerical aperture problem would be emphasized when the large display screen size of the active matrix type liquid crystal display device is manufactured.